Despite challenges in the semiconductor industry, innovation continues. The evolution and refinement of a variety processes, memory technologies, and packaging technologies are creating new technology frontiers. Today, I want to take a look at some of the most interesting evolutions in the space.
Silicon On Insulator (SOI) is a process technology developed to extend performance and power improvements in any given conventional bulk CMOS node. To describe it in somewhat simplistic terms, SOI consists of adding a layer of glass to conventional silicon. Due to the insulating properties of the added glass layer, transistors can be built in the silicon matrix with more current drive and in closer proximity than in conventional CMOS processes. Depending on design and library choices, one could optimize an SOI-based chip design for superior performance or greater power efficiency. The technology also offers some advantages compared to mil/aero applications because of its added resistance to soft errors in memory.
IBM pioneered the commercial use of SOI, offering a process node at 180nm for ASIC clients at the end of the 1990's. Despite hopes at the time of launch and efforts for several years afterwards, IBM was never able to consistently offer more than 10 to 15% improvements in power or performance at the sacrifice of a 20 to 25% greater cost. That's not enough for widespread adoption.
Nevertheless, SOI was adopted and used by other chip companies – Freescale, AMD, and STMicroelectronics, to name a few. In addition, some companies making RF chips are using variant of SOI that uses sapphire instead of glass as the insulating layer.
Samsung seems to be the latest firm to join the fray, having just licensed STM’s 28nm SOI process last year for use in mobile computing applications. There is a general interest across the chip industry in giving SOI another look – specifically, fully depleted (FD) SOI as an alternative to FinFET.
Despite over a decade and a half of dedicated manufacturing effort to optimize SOI nodes, though, it is still not a perfect balm for the end of Moore's Law. Some dispute that SOI allows optimization of designs for two P's – performance and power – at the expense of the third: price. Proponents and their counterparts in opposition get into very heated technical arguments over this very issue. One thing that is generally agreed on, though, is that the incremental benefits of SOI are likely to run out of steam beyond the 14nm node.
Another area of renewed interest in Silicon Valley has been in exploring different memory technologies and architectures. Some of these efforts were stimulated by the burst in enterprise networking business that started in the final part of the last decade, as routers began updating to 10Gb and then 40/100Gb bandwidths to support the growing backhaul demands of mobile computing. Several memory IP startups arose from this networking revitalization, including companies such as Memoir Systems (recently acquired by Cisco) and Crossbar. Another source of inspiration has been the runaway success of Flash-based devices for applications such as SSD.
There seem to be quite a few memory technologies undergoing intensive applied R&D – some with development histories going back to the early 1990's or even earlier. Among them are:
1. Magnetoresistive random-access memory (MRAM): This technology has been in and out of the news for nearly three decades but never seems to have hit its stride. In its simplest form, ferromagnetic elements are used to 'store' data based on the polarity of the elements. One is permanently polarized while the other is programmable. The value of the data can be read by a transistor that senses the resistance of the cell, which changes based on whether the magnetic elements have the same or opposite polarity. Some of you might notice how this sounds something like the magnetic 'core' memory of the 1960's.
New development efforts are focused on the scaling and power problems MRAM has had in the past. Applied research continues because MRAM does indeed offer the theoretical promise of better performance than DRAM, the same density and much lower power requirements. MRAM also provides the permanence of Flash while consuming much less power and avoiding the programmable endurance issue. Once perfected, it might be able to compete even with SRAM for lower performance applications while offering much superior density. This would make MRAM a kind of 'super memory' that could replace all other architectures for most applications. An alliance of nearly two dozen American and Japanese companies was formed at the end of 2013 with this end in mind.
2. Resistive random-access memory ( ReRAM): Also known as RRAM, this may offer promise over not only conventional memories, but many of the novel architectures currently being researched. Based on a broad variety of organic and nonorganic oxides or complex compounds, the basic idea involves what might be grossly termed a regrowable fuze as the data storage element. The research suggests that RRAM can offer superior performance, power and scaling compared to any other memory architecture currently in use or still being researched, but it has yet to prove this in large-scale manufacturing. Crossbar is probably the most widely known leader in RRAM and announced last December that they were preparing to commercialize the technology by Q4 2015 or Q1 2016.
3. Ferroelectric RAM (FRAM): This resembles DRAM in application and architecture but uses very different materials. A bit is held by a thin film of exotic polarized rewriteable material. It purports to offer the additional benefit of Flash-like non-volatility but with much greater reprogramming endurance, significantly less power required for the write cycle and much faster programming as well. However, reading the cell destroys any information it may contain, requiring a rewrite cycle afterwards to restore the original state. Research into semiconductor-based applications of FRAM began in earnest 25 years ago. Despite having been in production for over twenty years, FRAM has yet to make a significant impression on the semiconductor market. The technology has not achieved the same scaling into deeper submicron as DRAM or Flash, nor can it offer the bit densities of Flash.
There are many other memory technologies being researched or manufactured in small quantities in pilot lines. Which ones will prevail? I haven't the vaguest idea, to be blunt. Ask the same question to people in the development labs for any chip company, foundry, or research institute and you're likely to get many different answers.
I was a very green-around-the-gills marketing guy at Raytheon Semiconductor in 1991 when the company was participating in a Department of Defense (DoD) project to develop FRAM. The very first films implemented on silicon left the Raytheon researchers shaking their heads in shock and disappointment. Nevertheless, R&D work continued. The demise of Moore's Law will add significant impetus to all of these research efforts, so that some clear winners are more likely to emerge in the next several years.
Memories are only one half of the improvement required for digital integrated circuits. The other is, of course, the processing logic. With no more room to effectively drive 3P improvements thru smaller physical dimensions, companies are exploring a completely different direction for adding gates – they're going vertical.
But that, dear readers, is the subject of a future post.