PHOENIX–It should come as no surprise that semiconductor foundry manufacturers are booming. The semiconductor industry has been transformed. But it's not just fabless versus IDM (Integrated Device Manufacturer). Revenue has shifted from Embedded MPUs, MCUs, DSPs and Standard Cell ASICs to Special Purpose Logic chips. Integration has taken over MOS Logic sales, creating a huge increase in the sales of fully integrated semiconductors. Most of these chips are being manufactured by foundries.
Let's take a closer look at MOS Logic markets over the last eleven years, beginning with the year 1999 rather than 2000 to eliminate the effects of the dot-com boom-and-bust in 2000 and 2001. From 1999 through 2010 Special Purpose Logic sales increased from $16.5 billion to $59.3 billion, a CAGR of 12.3%. During the same time period computing MPU sales grew from $27.2 billion to $38.8 billion, a CAGR of only 3.6%. No other MOS logic category had significant growth, either because the sales base was too low or because the CAGR was too low.
Special Purpose Logic sales are greater than MPU, MCU and DSP sales combined and nearly five times the sales of standard cell ASICs and FPGAs combined. In fact, Special Purpose Logic sales in 2010 were greater than sales for any other semiconductor device type. What has happened?
Special purpose logic is a hodge-podge of different semiconductor types that include ASICS, ASSPs, SoCs and core based ICs for specific markets. Parsing the differences is beyond the scope of this article; but the unifying characteristic is that, no matter what the definition, design methodology or type of CPU core, Special Purpose Logic semiconductors are highly integrated chips in volume production as standard or semi-standard products.
Following Moore's Law, doubling roughly every two years, the number of transistors that can be manufactured on a chip has increased more than 100 times from 1999 to 2010. As a result, more functions, including multiple MPU, MCU or DSP cores, other logic functions, and I/O can be integrated onto a chip. This has changed the design of end-use products.
Ten or more years ago, most end-use product designs used a CPU (an embedded MPU, an MCU or a DSP) surrounded by several other logic and I/O devices. Today, the level of integration has increased dramatically. While not all systems can be reduced to one chip, the level of integration possible can reduce the chip count for almost all systems. There are other potential benefits. The functionality can be increased, the system footprint can be reduced or costs can be reduced. In addition, performance can be increased or power consumption reduced. Any combination of these benefits or all can be realized.
NRE (Non-Recurring Engineering) costs have always been an issue for ASICs, but the semiconductor industry has found ways to reduce this limitation for highly-integrated devices. One has been the re-use of blocks of logic, spreading NRE across several designs. A second has been the use of IP (Intellectual Property), blocks of logic designed by small, independent companies. By selling their IP to multiple parties, these companies can, again, spread the NRE across several designs. Purchasing IP from an IP vendor has an added benefit. Design engineers can add functionality beyond their own expertise or experience.
Semico has been following these trends from their beginnings. Six reports covering Intellectual Property trends, ASIC design starts, and SoC design methodologies were published in 2010 alone. Earlier reports covered SoC markets, costs and trends.
For additional information or to purchase any of these reports, please contact: